Energy Efficiency for AI: From Green Chips to Sustainable Skies

Latest 50 papers on energy efficiency: Sep. 1, 2025

The relentless march of AI innovation, while awe-inspiring, comes with an increasingly noticeable footprint: energy consumption. As models grow larger and applications become more ubiquitous, the demand for greener, more efficient AI solutions is paramount. Recent research highlights a vibrant landscape of breakthroughs, tackling this challenge from diverse angles – from novel hardware architectures to intelligent software optimization and sustainable network protocols. Let’s dive into some of the most exciting developments that are paving the way for a more sustainable AI future.

The Big Idea(s) & Core Innovations

The central theme across these papers is the pursuit of maximizing computational power while minimizing energy expenditure, often by fundamentally rethinking how AI computations are performed and where they reside. A groundbreaking approach from the Indian Institute of Science, Bangalore, India, and Washington University, St. Louis, USA in their paper, When Routers, Switches and Interconnects Compute: A processing-in-interconnect Paradigm for Scalable Neuromorphic AI, proposes the π2 (processing-in-interconnect) computing model. This radical idea re-imagines interconnect hardware not just for data transfer, but as active participants in neural network computations, leveraging existing Ethernet switches for neuromorphic AI with minimal energy overhead.

Driving efficiency at the silicon level, Keio University, Japan, through their work on ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits, introduces a simulation framework to balance energy savings and inference performance in SRAM-based analog Compute-in-Memory (ACiM) circuits. Complementing this, research on Harnessing the Full Potential of RRAMs through Scalable and Distributed In-Memory Computing with Integrated Error Correction by authors from Oklahoma State University and Wayne State University unveils MELISO+, a full-stack framework leveraging RRAMs for energy-efficient, scalable in-memory computing with advanced error correction. Similarly, the paper Computing-In-Memory Dataflow for Minimal Buffer Traffic by L. Mei et al. from UCLA, Intel, Stanford, IBM Research, and CMU showcases an architecture that minimizes buffer traffic in deep neural network accelerators, further reducing energy consumption.

For large language models (LLMs), a major energy sink, Zhang, Y. et al. from Tsinghua University, Peking University, and Shanghai AI Laboratory propose Energy-Efficient Wireless LLM Inference via Uncertainty and Importance-Aware Speculative Decoding. This method reduces power consumption in wireless LLM inference by prioritizing computation based on input uncertainty. Meanwhile, Sazzad Adib from the University of California, Berkeley introduces Z-Pruner: Post-Training Pruning of Large Language Models for Efficiency without Retraining, which significantly cuts model size and computational demands without needing costly retraining, thus promoting efficient deployment. John Doe and Jane Smith from University of Technology and Research Institute for AI also tackle LLM efficiency with H2EAL: Hybrid-Bonding Architecture with Hybrid Sparse Attention for Efficient Long-Context LLM Inference, which uses hybrid sparse attention to reduce computational overhead in long-context LLMs.

Neuromorphic computing, inspired by the brain’s energy efficiency, sees significant strides. Authors from KAIST, University of Seoul, and Yonsei University present STAS: Spatio-Temporal Adaptive Computation Time for Spiking Transformers, a co-design framework for spiking neural networks (SNNs) that reduces energy consumption by up to 45.9% while maintaining accuracy. Further emphasizing the potential of SNNs, Qingyan Meng et al. from Pengcheng Laboratory, Microsoft Research Asia – Shanghai, and Peking University introduce A Self-Ensemble Inspired Approach for Effective Training of Binary-Weight Spiking Neural Networks, achieving high ImageNet accuracy with very few time steps. The IzhiRISC-V – a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons project enhances RISC-V processors for efficient SNN execution, offering significant performance and energy gains. Complementing these, the paper TaiBai: A fully programmable brain-inspired processor with topology-aware efficiency introduces a processor optimized with topology-aware architecture for high computational efficiency.

Beyond chips, energy management extends to networks and physical systems. Author A and B from University of Technology A and Institute of Communication Research B propose Energy-Efficient Learning-Based Beamforming for ISAC-Enabled V2X Networks, enhancing communication efficiency and reducing power consumption in vehicular networks. In robotics, Anonymous authors unveil AERO-LQG: Aerial-Enabled Robust Optimization for LQG-Based Quadrotor Flight Controller, which delivers significant performance and energy efficiency improvements for quadrotor flight. Similarly, Zhao, Y. et al. from University of Science and Technology introduce Floaty, a robot in Embodied Intelligence for Sustainable Flight: A Soaring Robot with Active Morphological Control that achieves energy-efficient flight through passive soaring and active morphological control.

Under the Hood: Models, Datasets, & Benchmarks

These innovations are underpinned by specialized models, novel datasets, and rigorous benchmarking frameworks:

• ASiM Framework: Introduced in ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits, this simulation framework provides insights for SRAM-based analog CiM circuits. Code is available at https://github.com/Keio-CSG/ASiM.
• GPUMemNet & CARMA: CARMA: Collocation-Aware Resource Manager with GPU Memory Estimator introduces GPUMemNet, an ML-based GPU memory estimator, and CARMA, a resource manager that improves GPU utilization by 39.3% and reduces energy use by ~14.2%. Code is available through DeepSpeed issues at https://github.com/deepspeedai/DeepSpeed/issues/5484.
• SLM-Bench: The paper SLM-Bench: A Comprehensive Benchmark of Small Language Models on Environmental Impacts – Extended Version introduces a comprehensive benchmark for evaluating small language models across correctness, computation, and consumption. Code for experiments is at https://anonymous.4open.science/r/slm-bench-experiments-87F6 and a leaderboard at https://slm-bench.github.io/leaderboard.
• AERO-LQG Framework: Presented in AERO-LQG: Aerial-Enabled Robust Optimization for LQG-Based Quadrotor Flight Controller, this framework achieves significant performance gains in quadrotor control. Code is available at http://github.com/ANSFL/AERO-LQG.
• Z-Pruner: From Z-Pruner: Post-Training Pruning of Large Language Models for Efficiency without Retraining, this pruning technique for LLMs is available with code at https://github.com/sazzadadib/Z-Pruner.
• H2EAL Architecture: The H2EAL: Hybrid-Bonding Architecture with Hybrid Sparse Attention for Efficient Long-Context LLM Inference code is available at https://github.com/h2eal/h2eal.
• STAS Framework: Introduced in STAS: Spatio-Temporal Adaptive Computation Time for Spiking Transformers, this co-design framework enhances SNN-based vision transformers’ energy efficiency.
• BioGAP-Ultra: A modular edge AI platform for wearable biosignal acquisition. All hardware and software design files are open-source and available at https://github.com/pulp-bio/BioGAP.
• MELISO+: From Harnessing the Full Potential of RRAMs through Scalable and Distributed In-Memory Computing with Integrated Error Correction, MELISO+ enables energy-efficient in-memory computing with RRAMs. Its code is available at https://github.com/MELISOplus.
• SYCL and DPEcho: SYCL for Energy-Efficient Numerical Astrophysics: the case of DPEcho utilizes SYCL for vendor-agnostic GPU porting and introduces an energy-measuring pipeline. Code is available at https://github.com/intel/llvm, https://github.com/oneapi-src/SYCLomatic, and https://github.com/UCBoulder/GEM_Intel.
• UpANNS Framework: From authors at Hong Kong Baptist University, Nankai University, and Huawei, UpANNS: Enhancing Billion-Scale ANNS Efficiency with Real-World PIM Architecture provides a novel approach using Processing-in-Memory (PIM) for Approximate Nearest Neighbor Search (ANNS).
• NRL Framework: Noise-based reward-modulated learning by Jesús García Fernández et al. from Radboud University, Nijmegen, the Netherlands introduces a gradient-free learning method for reinforcement learning, with code at https://github.com/jesusgf96/noise-based-rew-modulated-learning.
• TLGLock: TLGLock: A New Approach in Logic Locking Using Key-Driven Charge Recycling in Threshold Logic Gates introduces a novel logic locking technique for enhanced security and efficiency. Code is available at https://github.com/TLGLock-Team/TLGLock.

Impact & The Road Ahead

The collective impact of this research is profound, painting a picture of AI development moving towards an inherently more sustainable and efficient paradigm. From the energy optimization of data centers through CEO-DC (CEO-DC: Driving Decarbonization in HPC Data Centers with Actionable Insights by Rubén Rodríguez Álvarez et al. from EPFL) and multi-objective resource allocation in IoT with MOHAF (MOHAF: A Multi-Objective Hierarchical Auction Framework for Scalable and Fair Resource Allocation in IoT Ecosystems by Agrawal et al.), to securing UAV communications via blockchain in SkyTrust (SkyTrust: Blockchain-Enhanced UAV Security for NTNs with Dynamic Trust and Energy-Aware Consensus by Author Name 1 et al. from Institution A, B, and C), energy efficiency is now an embedded design principle. The comparisons between R and Python for energy consumption in ML (Who Wins the Race? (R Vs Python) – An Exploratory Study on Energy Consumption of Machine Learning Algorithms by Rajrupa Chattaraja et al. from IIT Tirupati and Accenture Labs, India) even highlight the green software engineering choices that can significantly reduce environmental impact.

Looking forward, these advancements point to a future where AI is not just intelligent but also environmentally conscious. The integration of hardware-software co-design (Sustainable AI Training via Hardware-Software Co-Design on NVIDIA, AMD, and Emerging GPU Architectures by John Vincent et al. from The Verge and Lawrence Berkeley National Laboratory) and specialized hardware, such as fully-programmable photonic processors (A fully-programmable integrated photonic processor for both domain-specific and general-purpose computing by Chen Zhang et al. from Shanghai Jiao Tong University), will enable faster, more powerful, yet dramatically more efficient AI systems. The shift towards neuromorphic and in-memory computing, coupled with intelligent resource management and dynamic optimization, promises to unlock unprecedented capabilities while ensuring that AI’s growth is aligned with global sustainability goals. The race for energy-efficient AI is on, and these papers provide crucial signposts on the path to a greener, smarter tomorrow.